- Capture images at the highest Camera Link rates with support for the Full and 80-bit modes at up to 85MHz (single-Full model).
- Eliminate lost pixels through a PCIe® 2.0 x8 host interface and ample on-board buffering.
- Reduce cabling and eliminate power supplies by way of Power over Camera Link (PoCL) support.
- Offload and accelerate image processing to free and assist the host CPU using an Altera® Stratix® V FPGA.
- Simplify the development of custom on-board image processing using the optional Matrox FPGA Development Kit (FDK).
- Reduce development and validation costs through a managed lifecycle offering consistent long term availability.
- Implement image capture with ease and confidence using Matrox Imaging Library (MIL) application development toolkit.
- Maintain flexibility and choice by way of 64-bit Windows 7/8.1/10, Linux® and RTX64 (RTOS) support.
| PCIe® 2.0 x8 host bus interface |
| Altera Stratix V 340K LE FPGA device – for Matrox or custom image processing algorithms designed with Matrox FDK |
| 2 GB of DDR3-1600 SDRAM |
| 0/16/32 MB of QDR2 SRAM |
| Camera Link® 2.0 acquisition – Mini Camera Link connectors (HDR-26) – Power over Camera Link with SafePower – 20 to 85 MHz Camera Link clock – One (1) Medium/Full Camera Link port (single-Full model) • Support for 8-tap x 10-bit and 10-tap x 8-bit (80-bit) modes – Two (2) Base Camera Link ports (dual-Base model) |
| Supports frame and line scan sources |
| On-board image reconstruction |
| On-board color space conversion |
| Input formats – Mono/Bayer 8-bit and 16-bit – BGR packed 24-bit and 48-bit |
| Output formats – Mono 8-bit and 16-bit – 24-bit BGR/RGB packed – 32/48-bit BGRa/RGBa – YUV 16-bit – YCrCb |
| One (1) DBHD-15 male GPIO connector – Three (3) TTL configurable auxiliary I/O’s – Two (2) LVDS auxiliary inputs – One (1) LVDS auxiliary output – Two (2) opto-isolated auxiliary inputs |
| Optional add-on DBHD-15 male GPIO connector – Three (3) TTL configurable auxiliary I/O’s – Two (2) LVDS auxiliary inputs – One (1) LVDS auxiliary output – Two (2) opto-isolated auxiliary inputs |
| Support for one (1) quadrature rotary encoder per Camera Link® port |
| MIL license fingerprint and storage |
Ordering Information
| Model | Description |
|---|---|
| RP2GDB340300* | Matrox RadientPro dual-Base Camera Link® PCIe® 2.0 x8 frame grabber with 2 GB DDR3 SDRAM, Altera Stratix V 5SGXA3 FPGA and no SRAM |
| RP2GSF340300* | Matrox RadientPro single-Medium/Full Camera Link® PCIe® 2.0 x8 frame grabber with 2 GB DDR3 SDRAM, Altera Stratix V 5SGXA3 FPGA and no SRAM |
RadientPro CL variations with SRAM available upon request
